1. Field of the Invention
This invention relates in general to the field of microelectronics, and more particularly to an apparatus for varying a bias signal to an oscillator within a integrated circuit random number generator.
2. Description of the Related Art
Many present day computer-based applications rely heavily on the availability of random numbers. What has historically been the province of scientific programmers has more recently crept over into the commercial realm.
In prior years, large and powerful computing systems utilized random numbers for use within simulation programs to realistically model stochastic properties of phenomena of interest, such as the flow of traffic within a large network of computers.
And while the requirement for efficient and convenient generation of random numbers has not declined with respect to the modeling and simulation areas, because technological advances have provided more computing power to desktop computers in more recent years, such requirements have been imposed on the elements of desktop computers themselves. In fact, processing power increases in desktop computing have given rise to entirely new application areas that depend upon the generation of random numbers. For instance, random numbers are now widely used within many computer games to locate, say, asteroids or enemy fighters. To be acceptable to the consumer as a credible representation of reality, computer games must simulate their corresponding phenomena of interest in the same probabilistic fashion as one would expect such phenomena to occur in real life.
Another application area that depends upon the availability of random numbers is cryptography, an area that continues to provide very demanding criteria for random number generation. Within this field, random numbers are employed as cryptographic keys that are used by algorithms to encrypt and decrypt electronic files or streams of data for storage or transmission. For example, random keys are generated to encrypt financial data as secure electronic transactions are processed over the Internet. Remarkably, it is becoming more and more commonplace to find that ordinary electronic mail messages and the like are being encrypted for transmission between parties.
At present, most of the random number generation within desktop computing systems is accomplished within an application program. This form of generation is known as pseudo-random number generation because generation of the numbers employs a mathematical algorithm to produce a sequence of independent numbers that comport with a uniform probability distribution. Typically, axe2x80x9cseedxe2x80x9d number is initially selected, then the algorithm proceeds to crank out numbers that appear to be random, but that are entirely deterministic in nature given knowledge of the seed. To be truly random, a random number generator must be based upon random attributes of some physical devices, such as the thermal noise generated across a diode or resistor.
Some hardware-based random number generators are available as separate integrated circuits, but to date, no hardware technique or approach exists that lends itself to incorporation within a microprocessor circuit. And since a microprocessor is the heart of any desktop computing system, it is advantageous for random numbers to be generated directly within the microprocessor itself.
Therefore, what is needed is a hardware-based random number generator that is easily incorporated into an integrated circuit design, and in particular, into the design of a present day microprocessor.
In addition, what is needed is a random number generation apparatus that utilizes logic elements which are common to those used within a microprocessor integrated circuit.
The present invention provides a superior technique hardware-based random number generation. In one embodiment, an apparatus for generating a random number is provided. The apparatus has a first variable frequency oscillator, a second variable frequency oscillator, and a variable bias generator. The first variable frequency oscillator generates a first oscillatory signal at a first frequency. The a second variable frequency oscillator generates a second oscillatory signal that is asynchronous to the first oscillatory signal and has a second frequency less than the first frequency, where bits of the random number are configured from samples of the first oscillatory signal taken at the second frequency. The variable bias generator is coupled to the first and second variable frequency oscillators, and generates an analog bias signal. The first and second frequencies vary according to the analog bias signal, and the analog bias signal varies based upon logic states of a plurality of bits of the random number.
One aspect of the present invention contemplates a random number generation apparatus for use within an integrated circuit. The random number generation apparatus has a fast oscillator, a slow oscillator, domain synchronization logic, and a bias generator. The fast oscillator generates a fast oscillatory signal at a first frequency. The slow oscillator generates a slow oscillatory signal, where the slow oscillatory signal is decoupled from the fast oscillatory signal and is at a second frequency that is less than half of the first frequency. The domain synchronization logic is coupled to the fast and slow oscillators. The domain synchronization logic samples the fast oscillatory signal in phase with the slow oscillatory signal to obtain bits for a random number. The bias generator generate a bias signal that is distributed to the fast and slow oscillators, where the first frequency and a range for the second frequency are set according to the bias signal, and where the bias generator varies the bias signal according to states of a plurality of the bits.
Another aspect of the present invention comprehends an apparatus for randomly varying an analog bias signal in a random number generator. The apparatus includes summation logic and means for generating a random noise signal. The summation logic sums a static bias signal with the random noise signal to generate the analog bias signal. The means for generating the random noise signal is coupled to the summation logic and is configured to vary the random noise signal according to logic states of a plurality of bits of a random number as the random number is being configured by the random number generator.